Electronics Projects Index

After transitioning to WordPress, I started writing up my newer projects as ‘blog posts’ rather than ‘pages’. Please find below a list of links to every electronics project related blog post:

Comments (14)

  1. Robert Reynolds says:
    August 22, 2016 at 5:43 pm

    Hi Scott

    Love your site and your youtube videos. Thanks for sharing

    I wondered whether you are planning on uploading the designs for your SIO and CTC boards to OshPark?

    Thanks

    Rob

  2. admin says:
    August 22, 2016 at 10:32 pm

    Yes, I’ll be sharing the designs soon. The CTC board design is good. The SIO I had to revise due to a few errors.

  3. Pingback: Intro to Z80 Retrocomputing - Dr. Scott M. Baker
  4. Pingback: Z80 retrocomputing 11 – CP/M on the RC2014 - Dr. Scott M. Baker
  5. Paul Bigwood says:
    September 10, 2016 at 9:09 am

    Hi Scott, Fixed the problems with OSH Park! My order for 5 of your boards in one go seemed to glitch the website. Jenner fixed and I am waiting for them to arrive. Already gone to FAB so hopefully should here in the UK in short time.

    I think there may be a typo in the Programming the CTC as a baud rate generator section above. in the 4th para you say

    …This led me to try operating the SIO/2 in counter mode with an external trigger. … should this not be CTC?

    Best Regards
    Paul

  6. admin says:
    September 10, 2016 at 8:36 pm

    Yes, that looks like a typo. Thanks. I’ll fix!

    Scott

  7. Derrick Green says:
    February 23, 2017 at 11:47 pm

    Sir,

    I was curious what the resistor values are for the SIO/2 board.I did not see this on the schematic. I purchased a copy this the board from OSH park and have the parts.I assume the Caps is the standard. My RC2014 is up and running and researching your wonderful projects.I am looking forward to getting CP/M working. Great work!

  8. Ron Pool says:
    March 11, 2017 at 9:40 pm

    Hi Scott,

    These look well very attractive, well thought out, and understandable with just a little study. Today I ordered a set of your CTC and SIO/2 boards from OshPark, along with some of your other RC2014 boards. I’m really looking forward to building them and coding drivers for them.

    Two questions: 1) What are the resistor values on the SIO board? 2) Do you anticipate any problems if I use a 7.3728 Mhz oscillator on the SIO board instead of using the RC2014’s system clock — in particular do you expect there would be problems if the system clock and SIO’s separate clock ran at different speeds or were not exactly in sync with each other?

    Thanks!

  9. Ron Pool says:
    March 12, 2017 at 12:30 am

    Oops… For my second question I meant to ask about putting the oscillator on the CTC, not on the SIO. That question should read:

    2) Do you anticipate any problems if I use a 7.3728 Mhz oscillator on the CTC board instead of using the RC2014’s system clock — in particular do you expect there would be problems if the system clock and CTC’s separate clock ran at different speeds or were not exactly in sync with each other?

  10. admin says:
    March 12, 2017 at 5:05 pm

    I don’t think there would be an issue, that’s one of the reasons why I added a crystal footprint to the board (as well as the SIO/2 board), though I haven’t used it myself. Please let us know how it turns out!

  11. admin says:
    March 12, 2017 at 5:05 pm

    Resistor values are 2.2K.

  12. admin says:
    March 12, 2017 at 5:07 pm

    The resistor values are 2.2K. The capacitors should be standard 0.1uF bypass caps.

  13. Thaloi says:
    March 2, 2021 at 11:16 am

    The 1x clock mode was also erratic for me. Switching to counter mode and then 16x multiplier on the SIO did work stable.

    Why the 1x clock mode doesn’t work I think:

    The datasheet says:

    “If the x1 clock mode is selected, bit synchronization must be accomplished externally. ”

    I think this is what the problem is: The clock is only as fast as the baud rate. To read in the middle of the bit we need an edge in the middle of the bit. The CTC doesn’t provide a falling edge in the middle because it’s duty cycle is less than 5%. That falling edge for read sometimes coincide with an edge of the signal. With 16 ticks, it’s easy to read in the middle of the bit.

  14. carl harris says:
    February 3, 2022 at 12:49 am

    If you take a look at the Z80 Peripherals Guide (http://www.z80.info/zip/um0081.pdf) page 235 (PDF page 255) under the heading “Asynchronous Receive” you’ll find the answer to the mystery of why the 1x clock divisor mode didn’t work reliably for you.

    Like any asynchronous receiver, in order to reliably synchronize the bit timing at the start (and within the sequence) of a frame (start bit, data bits, parity, stop bit(s)), the SIO needs to sample the state of the receive data line at multiple of the bit rate. With the clock divisor set to 16, the sample rate is 16 times the bit rate — i.e. a full bit time is 16 clocks. When the receiver sees a transition to logic 0 for the beginning of a start bit, it doesn’t consider it to be start bit unless it stays at logic 0 for half a bit time — with the divisor set to 16, that’s 8 clocks. After the receiver is sure that it saw a start bit, then the “center” of each of the following bits will occur at intervals that are 16 clocks in length.

    If the divisor is set to 1 (as noted in the document), you are obliged to include additional logic in the circuit to the synchronize to the start of each “frame” and fire clocks at the appropriate times to reliably read the state of each bit.

    Absent the frame-to-frame synchronization that occurs when the receiver’s sample rate is a multiple of the bit rate, or some external logic to do the synchronization when the receiver’s sample rate is equal to the bit rate, it cannot work reliably.

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