In this post, I build a couple of different floppy controllers for the RC2014, and run CP/M on them.
If you haven’t read my other video on CP/M on the RC2014, please start there.
Why a floppy controller when I have a perfectly good CompactFlash board? The floppy is more period accurate. If you’re building a retrocomputer, then speed and storage density are probably not your primary concern (just go buy yourself a raspberry pi instead!). The goal with retrocomputing is trying to reproduce the technology of a bygone era. For most of us that is probably the floppy disk.
There’s a number of possible floppy drives that can be considered, most notably the 8″, 5.25″, and 3.5″. Of these, the easiest to obtain drives and media for is the 3.5″. You might even have a drive laying around from a defunct computer. So let’s start with the 3.5″.
I started by looking on the Internet with a google search for “Z80 Floppy Controller”. The first result, which seemed very promising was the N8VEM DiskIo V3 board, which used the FDC9266 Floppy Controller. I adapted this circuit for the RC2014:
This design is based almost entirely on the DiskIO V3.
As you can see, the FDC9266 implementation is fairly complex. The guts of the circuit is the FDC9266 itself. The complication is that it uses active-high signals whereas our 3.5″ PC floppy drive uses active-low signals. This leads to a whole lot of hex inverters, on nearly every signal that goes between the controller and the drive. For outputs, we us a 74HCT04. For inputs we use a 74HCT14, which offers a schmitt trigger input. Note also the pullups on the lines from the floppy.
An additional complication is that five of the output pins of the FDC9266 (WP/TS, FLT/TR0, FR/STEP, LCT/DIR) are multiplexed. They have one meaning when seeking and a different meaning when reading/writing. This leads to a 74HCT240 being used to demultiplex these signals. The FDC9266 doesn’t give us control of the motors, and it needs some additional control signals (P0, P1, P2, TC). This leads us to implement a latch using a 74HCT273N. Finally, the FDC9266 outputs its drive selects not as individual control likes but rather as a 2-bit binary value, leading to the need for a 74HCT139 to convert those two bits into a set of drive selects.
No sooner did I order the above design from Osh Park did I then stumble on a simpler design using the WDC37C65:
This design, based on the Zeta 2 Single Board Computer by Sergey Kiselev, fixes several of the gripes about the FDC9266. It outputs active-low signals so the plethora of inverters are not needed. It does not multiple pins, so the demultiplex chip is not needed, it has a built in DOR register so there’s no need for an external latch, and it outputs drive selects directly so we need no 74HCT139. The result is that many chips are eliminated.
I built and tried out both these designs, and I vastly prefer the WD37C65 due to the reduced complexity.
I ordered both boards from Osh Park and built them up:
The reduced complexity of the WD37C65 circuit is evident from the lower chip count. It’s not earth shattering, but any simplification is a benefit. In addition, having the DOR register built into the chip seems to make the programming easier.
To make this thing work, I used the floppy driver from RomWBW. I modified the Grant Searle CP/M monitor, BIOS, and other assorted tools to use this driver, since Grant Searle’s CPM distribution has closer compatibility to the RC2014 I’ve built than RomWBW does. In the future, I’m probably going to transition my RC2014 over to RomWBW (future blog post!), but that’s going to take a bit of work.
I’ve committed the changes to the RomWBW driver to my github repo. There’s probably a few bits and pieces that I need to get together for anyone who wants to reproduce this — let me know what is missing if you try to build one of these yourself for the RC2104.
Using 8″ or 5.25″ floppy drives
I’ve managed to find myself an 8″ floppy drive on eBay and I’m going to give that a shot in a future blog post. There’s a little bit of complication due to a few extra pins (RWC = Reduced Write Current, and HDL = Head Load). Both chips have support for these pins, although in my WD37C65 board I failed to break the pin out to a pad (Bad! Always break unused pins out to a pad, as you never know when you’re going to use them!).
Using a 5.25″ drive will probably not be all that difficult, since we don’t have to worry about additional signals. It’ll just take some modifications to the CP/M bios to tell it what kind of drive (tracks, sectors, etc) to expect.
As always, I’ve enabled the boards to be shared on Osh Park: